Product Description
DSPIC33EP128MC206-I/PT MCU 16-bit dsPIC RISC 128KB Flash 3.3V 64-Pin
70MIPS DSP 128KB Flash 16KB RAM MCPWM OpAmps PTG 64-pins DSPIC33EP128MC206-I/PT
Features:
Analog Features:
• 12-bit Analog-to-Digital Converter (ADC) with: - 200 Ksps conversion rate - Up to 16 input channels - Conversion available during Sleep and Idle • Programmable Low-Voltage Detection (PLVD)
• Programmable Brown-out Reset Special
Microcontroller Features:
• Enhanced Flash program memory: - 10,000 erase/write cycle (min.) for industrial temperature range, 100K (typical)
• Data EEPROM memory: - 100,000 erase/write cycle (min.) for industrial temperature range, 1M (typical)
• Self-reprogrammable under software control
• Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
• Flexible Watchdog Timer (WDT) with on-chip low-power RC oscillator for reliable operation
• Fail-Safe Clock Monitor operation: - Detects clock failure and switches to on-chip low-power RC oscillator
• Programmable code protection
• In-Circuit Serial Programming™ (ICSP™)
• Selectable Power Management modes: - Sleep, Idle and Alternate Clock modes
Peripheral Features:
• High-current sink/source I/O pins: 25 mA/25 mA
• Five 16-bit timers/counters; optionally pair up 16-bit timers into 32-bit timer module
• 16-bit Capture input functions
• 16-bit Compare/PWM
output functions: • Data Converter Interface (DCI) supports common audio Codec protocols, including I2S and AC’97
• 3-wire SPI modules (supports four Frame modes)
• I2C™ module supports Multi-Master/Slave mode and 7-bit/10-bit addressing
• Two addressable UART modules with FIFO buffers
• Two CAN bus modules compliant with CAN 2.0B standard
High-Performance Modified RISC CPU:
• Modified Harvard architecture
• C compiler optimized instruction set architecture
• Flexible addressing modes
• 83 base instructions
• 24-bit wide instructions, 16-bit wide data path
• Up to 144 Kbytes on-chip Flash program space • Up to 48K instruction words
• Up to 8 Kbytes of on-chip data RAM
• Up to 4 Kbytes of nonvolatile data EEPROM
• 16 x 16-bit working register array
• Up to 30 MIPS operation: - DC to 40 MHz external clock input - 4 MHz-10 MHz oscillator input with PLL active (4x, 8x, 16x)
• Up to 41 interrupt sources: - Eight user-selectable priority levels - Five external interrupt sources - Four processor traps
DSP Features:
• Dual data fetch
• Modulo and Bit-Reversed modes
• Two 40-bit wide accumulators with optional saturation logic
• 17-bit x 17-bit single-cycle hardware fractional/ integer multiplier
• All DSP instructions are single cycle: - Multiply-Accumulate (MAC) operation
• Single-cycle ±16 shift
Specification:
|
Category
|
Interface - Drivers, Receivers, Transceivers
|
|
Mfr
|
|
|
Series
|
Digital Signal Controllers IC-MCU
|
|
Part Status
|
|
| Architecture |
16 |
| MaxSpeed (MHz) |
120 |
| CPU Speed (MIPS/DMIPS) |
30 |
| Program Memory Size (KB) |
132 |
| Multiple Flash Panels |
False |
| Temp. Range Min. |
-40 |
| Temp. Range Max. |
125 |
| Operation Voltage Min.(V) |
2.5 |
| Operation Voltage Max.(V) |
5.5 |
| Pin Count |
64 |
| Low Power |
No |
| Number of Comparators |
0 |
| Number of ADCs |
1 |
| ADC Channels |
16 |
| Max ADC Resolution (bits) |
12 |
| Max ADC Sampling Rate (ksps) |
200 |
| Number of DACs |
0 |
| DAC outputs |
0 |
| Max DAC Resolution (bits) |
0 |
| Hardware RTCC |
No |
| Motor Control PWM Channels |
0 |
| SMPS PWM Channels |
0 |
| Number of PWM Time Bases |
1 |
| Output Compare Channels |
8 |
| USB Interface |
None |
| Number of CAN Modules |
2 |
| Type of CAN module |
CAN |
| Crypto Engine |
No |
| Quadrature Encoder Interface (QEI) |
0 |
| Segment LCD |
0 |
| LCD/Graphics Interface |
No |
| Configurable Logic Cell Modules (CLC /CCL) |
0 |
| Peripheral Pin Select (PPS)/Pin Muxing |
No |
Environmental & Export Classifications
| ATTRIBUTE |
DESCRIPTION |
| RoHS Status |
ROHS3 Compliant |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| REACH Status |
REACH Unaffected |
| ECCN |
3A991B1A |
| HTSUS |
8542.32.0071 |
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