Transparent D Type Latches TI Ics SN74ABT162841DGGR SN74ABT16841 SN74ABT16843
SN74ABT162841DGGR Integrated Circuits IC
,SN74ABT162841DGGR TI Ics
,D Type Latches TI Ics
Texas Instruments (Electronic Components )
SN74ABT162841DGGR SN74ABT16841 SN74ABT16843 Transparent D-type Latches Texas instrument Integrated Circuits IC
- Specifications:
Category | Integrated Circuits (ICs) |
Logic & voltage translation | |
Mfr | Texas Instruments |
Series | Transparent D-type Latches ICs |
Package | Tray & Reel (TR) |
Part Status | Active |
PLL | Yes |
Main Purpose | General purpose |
Operating Temperature | -40°C ~ 85°C |
Mounting Type | Surface Mount |
Package / Case | SOIC |
Product Number | SN54ABT16373A SN54ACT373 SN54ACT573 |
Number of channels (#) | 16 |
Technology Family | ABT |
Supply voltage (Min) (V) | 4.5 |
Supply voltage (Max) (V) | 5.5 |
Input type | TTL-Compatible CMOS |
Output type | 3-State |
Clock Frequency (Max) (MHz) | 150 |
IOL (Max) (mA) | 64 |
IOH (Max) (mA) | -32 |
ICC (Max) (uA) | 89000 |
Features | Very high speed (tpd 5-10ns), Partial power down (Ioff), Power up 3-state, Flow-through pinout |
Features:
The 'ABT16373A are 16-bit transparent D-type latches with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
These devices can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components.
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT16373A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16373A is characterized for operation from -40°C to 85°C.
Environmental & Export Classifications:
ATTRIBUTE | DESCRIPTION |
---|---|
RoHS Status | ROHS3 Compliant |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
REACH Status | REACH Unaffected |
ECCN | EAR99 |
HTSUS | 8542.39.0001 |
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